1. Field of Invention
The present disclosure relates generally to the field of dicing microelectronic device wafers into individual microelectronic dice. In at least one embodiment, the present disclosure relates to forming a plurality of through silicon vias in the scribes streets of a microelectronic device wafer.
2. State of the Art
In the production of microelectronic devices, integrated circuitry may be formed in and on microelectronic device wafers. A single microelectronic device wafer may contain a plurality of substantially identical integrated circuits, which are usually substantially rectangular and arranged in rows and columns. In general, two sets of mutually parallel dicing streets may extend perpendicular to each other over substantially the entire surface of the microelectronic device wafer between each discrete integrated circuit.
After the integrated circuits on the microelectronic device wafer have been subjected to preliminary testing for functionality (wafer sort), the microelectronic device wafer may be diced (cut apart), so that each area of functioning integrated circuitry becomes an individual microelectronic die that can be used to form a packaged microelectronic device. One exemplary microelectronic wafer dicing process may use a circular diamond-impregnated dicing saw, which travels down two mutually perpendicular sets of dicing streets lying between each of the rows and columns. Of course, the dicing streets are sized to allow passage of a wafer saw blade between adjacent integrated circuits without causing damage to the circuitry.
The microelectronic device wafer may have guard rings which substantially surround the integrated circuit. The guard rings may extend through an interconnect layer. The interconnect layer can comprise multiple layers consisting of metal trace layers separated by dielectric material layers on a substrate. The interconnect layer can provide routes for electrical communication between integrated circuit components within the integrated circuits, as well as to external interconnects. The guard ring may generally formed layer by layer as the interconnect layer is formed. The guard ring can assist in preventing external contamination encroaching into the integrated circuitry from within the interconnect layer.
Prior to dicing, the microelectronic device wafer may be mounted onto a sticky, flexible tape that may be attached to a ridge frame. The tape may continue to hold the microelectronic die after the dicing operation and during transport to subsequent assembly steps. The saw cuts a channel in the dicing street through the interconnect layer and the substrate.
However, in the dicing of microelectronic device wafers, the use of industry standard dicing saws may result in cracks in the microelectronic device wafer. These cracks can propagate into the wafer below the interconnect layer and may result the cracking and/or delamination of the layers in the interconnect layer. Such cracking and/or delamination may result in fatal defects in the integrated circuitry.